This invention relates generally to processing within a computing environment, and more particularly the optimization of sequential small data fetches to a larger source data segment.
Most computer systems include a main memory and a cache system to expedite access to main memory data. A typical cache system comprises a cache to store data fetched from or written to main memory, and a directory to store addresses of the data copied into the cache. A processor or requestor can access the cache faster than the main memory because the cache is typically smaller than the main memory and located closer to the processor than the main memory in a typical system hierarchy.
Storage protection keys are used in a computer system to control the access of pages in main memory that the storage protection keys are associated with. The storage protection keys are generally used to limit the areas of main memory that a program is allowed to access. The storage protection keys are usually kept in a key memory array at the same level as main memory. The key memory array can be maintained in dedicated memory arrays, custom designed memory modules that hold both keys and data or a reserved section of main memory.
The access time of storage protection keys have been improved by caching they keys along with the data in a paired cache that keeps each copy of each storage protection key associated with the data in the cache. They keys can also be cached in independent key caches not associated with a specific data cache. These types of key caches are often implemented between the highest level of data cache and the key memory array and are added to help limit the number of memory accesses for keys.
There is a development saving to utilizing the same memory modules for main memory and key memory arrays, however, the amount of data that is returned from the main memory is designed and optimized for system main memory data fetch and store applications instead of for storage protection keys. The storage protection key associated with the page of the target data is usually smaller than a system memory fetch. Thus, in order to limit the amount of fetches and stores to key memory, a key cache can be implemented to reduce the number of key memory requests and serve keys to the requester faster. However, data is still thrown away with a key cache design if the keys that are cached are smaller than the memory access size. So when a request misses in the key cache, a data segment of key protection keys is fetched from main memory. A portion of the data segment for the key cache is peeled off and stored in the key cache while the rest of the data is thrown away.
Throwing away all this data can be inefficient, especially if the requestor is fetching to many sequential pages (i.e., key ops mapping to a large portion of the main memory that includes many sequential pages) since the next fetch miss data may have been sitting in the data that was thrown away.